Field programmable gate arrays (FPGA) are integrated circuits consisting of two primary elements: An array of universal logic modules and a corresponding array of anti-fuses. The universal logic modules are made up of a number of functional devices, such as diodes, transistors, resistors and the like. The functional devices, in turn, are interconnected to create a number of digital logic devices such as NAND gates, AND gates and OR gates. A number of the inputs and outputs of these logic devices provide the inputs/outputs of the universal logic modules in which they reside. The inputs/outputs of the universal logic modules are connected to the array of anti-fuses such that various combinations of the inputs/outputs of the universal logic modules in the array can be created.
The anti-fuses essentially comprise an upper electrode and a lower electrode with a layer of thin dielectric or amorphous silicon therebetween. The first electrode may, for example, be connected to a selected input/output of a selected logic modules and the second electrode connected to a similar input/output of a second selected universal logic module. The connection between the two selected input/output terminals will be open until the connection is programed. The connection is programed by grounding one of the electrodes of the anti-fuse while applying a voltage to the other. The resulting current shorts out the anti-fuse material between them and the desired connection is made.
In currently available field programmable gate arrays, the anti-fuses are formed as an array adjacent a separate surface area of the substrate. The surface area adjacent which the anti-fuses are formed is laterally displaced from the surface area of the substrate over which the universal logic modules are formed. This configuration consumes area on the substrate which could be better used to form additional universal logic modules such that the capability of the gate array may be improved. In the alternative, the overall size of the integrated circuit could be significantly reduced if the need for substrate surface area could be reduced. Thus, currently programmable gate arrays have limited flexibility in downsizing and increased functional capability. Further, with the array of anti-fuses formed laterally to the universal logic modules, the conductors connecting the logic module to the array of anti-fuses must be significantly longer increasing problems with excess capacitance and resistance.
Therefore, a need has arisen for an improved field programmable gate array which makes more efficient use of the substrate surface of the integrated circuit.